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tsm9634 page 1 ? 2011 touchstone semiconductor, inc. all rights reserved. features ? alternate - source for max9634 ? ultra - low supply urrent: 1a ? wide input common mode range: +1.6v to +28v ? low input offset voltage: 25 0 v (max) ? low gain error: <0.5% (max) ? voltage output ? four gain options available: tsm9634 t: gain = 25v/v tsm9634 f: gain = 50v/v tsm9634 h: gain = 100v/v tsm9634 w: gain = 200v/v ? 5 - pin sot23 packaging applications notebook computers power management systems portable/battery - powered systems pdas smart chargers smart phones description the voltage - output tsm9634 current - sense amplifiers are electrically and form - factor identical to the max9634 current - sense amplifiers. consuming a very low 1a supply current, the tsm9634 high - side current - sense amplifie rs exhibit a 250 - v (max) v os and a 0.5% (max) gain error, both specifications optimized for any precision current measurement. for all high - side current - sensing applications, the tsm9634 features a wide input common - mode voltage range from 1.6v to 28v. the sot23 package make s the tsm9634 an ideal choice for pcb - area - critical, low - current, high - accuracy current - sense applications in all battery - powered portable instruments. all tsm9634 s are specified for operation over the - 40c to +85c extended temper ature range. a 1a, sot23 precision current - sense amplifier typical application circuit part gain option tsm9634t 25 v/v TSM9634F 50 v/v tsm9634h 100 v/v tsm9634w 2 00 v/v t he touchstone semicondu c tor logo is a registered trademark of touchstone semiconductor, incorporated. percent of units - % input offset voltage - v 0 10 25 35 10 30 0 40 15 20 input offset voltage histogram 5 20 30 50
tsm9634 page 2 tsm9634ds r1p0 rtfds absolute maximum rat ings rs+, rs - to gnd ................................ .............. - 0.3v to +30v out to gnd ................................ ........................ - 0.3v to +6v rs+ to rs - ................................ ................................ ..... 30v short - circuit duration: out to gnd .................... continuous continuous input current (any pin) ............................ 20ma continuous power dissipation (t a = +70c) 5 - pin sot23 (derate at 3.9mw/c above +70c) .. 312mw operating temperature range ...................... - 40c to +85c junction temperature ................................ ................ +150c storage temperature range ....................... - 65c to +150c lead temperature (soldering, 10s) ........................... +300c soldering temperature (reflow) ............................ +260c electrical and thermal s tresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. exposure to any absolute maximum rating conditions for extended periods may affect device reliab ility and lifetime . package/ordering inf ormation order number part marking carrier quantity tsm9634teuk+tp tadd tape & reel ----- tsm9634teuk+t tape & reel 3000 TSM9634Feuk+tp tadb tape & reel ----- TSM9634Feuk+t tape & reel 3000 tsm9634heuk+tp tade tape & reel ----- tsm9634heuk+t tape & reel 3000 tsm9634weuk+tp tadg tape & reel ----- tsm9634weuk+t tape & reel 3000 lead - free program: touchstone semico nductor supplies only lead - free packaging. consult touchstone semiconductor for products specified with wider operating temperature ranges.
tsm9634 tsm9634ds r1p0 page 3 rtfds electrical character istics v rs+ = v rs - = 3.6v; v sense = (v rs+ - v rs - ) = 0v; t a = - 40c to +85c, unless otherwise noted. typical values are at t a = +25c. see note 1 para meter symbol conditions min typ max units supply current (note 2) i cc v rs+ = 5v, t a = +25c 0.5 0.85 a v rs+ = 5v, - 40c < t a < +85c 1.1 v rs+ = 28v, t a = +25c 1.1 1.8 v rs+ = 28v, - 40c < t a < +85c 2.5 common - mode input range v cm guaranteed by cmrr , - 40c < t a < +85c 1.6 28 v common - mode rejection ratio cmrr 1.6v < v rs+ < 28v, - 40c < t a < +85c 94 130 db input offset voltage (note 3) v os tsm9634t/TSM9634F/ tsm9634h t a = +25c 100 250 v - 40c < t a < +85c 300 tsm9634w t a = +25c 100 250 v - 40c < t a < +85c 425 gain g tsm9634 t 25 v/v tsm9634 f 50 tsm9634 h 100 tsm9634 w 200 gain error (note 4) ge tsm9634 t/ tsm9634 f/ tsm9634 h t a = +25c 0.1 0.5 % - 40c < t a < +85c 0.6 tsm9634 w t a = +25c 0.1 0.7 - 40c < t a < + 85c 0.8 output resistance r out (note 5) tsm9634 t/f/h 7.0 10 13.2 k tsm9634 w 14.0 20 26.4 out low voltage v ol gain = 25 1.5 7. 5 mv gain = 50 3 15 gain = 100 6 3 0 gain = 200 12 85 out high voltage v oh v oh = v rs - - v out (note 6) 0.1 0.2 v note 1: all devices are 100% production tested at t a = +25c. all temperature limits are guaranteed by product characterization. note 2: extrapolated to v out = 0. i cc is the total current into the rs+ and the rs - pins. note 3: input offset voltage v os is extrapolated from v out with v sense set to 1mv . note 4: gain error is calculated by applying two values for v sense and then calculating the error of the actual slope vs. the ideal transfer characteristic: for gain = 25, the applied v sense is 20mv and 120mv. for g ain = 50, the applied v sense is 10mv and 60mv. for g ain = 100, the applied v sense is 5mv and 30mv. for g ain = 200, the applied v sense is 2.5mv and 15mv. note 5: the device is stable for any capacitive load at v out . note 6: v oh is the voltage from v rs - to v out with v sense = 3.6v/gain.
tsm9634 page 4 tsm9634ds r1p0 rtfds supply current vs common - mode voltage input offset voltage vs temperature supply current vs temperature percent of units - % input offset voltage - v input offset voltage - v temperature - c temperature - c supply curent - a supply voltage - volt 0 10 25 35 10 30 0 40 1.8v 28v 3.6v supply current - a typical performance characteristics v rs+ = v rs - = 3.6 v; t a = +25 c, unless otherwise noted. - 40 - 15 10 35 85 60 15 20 0.2 0.6 0 0.4 1 0.8 0 40 - 20 20 80 60 0.2 0.6 0.8 0 0.4 1 input offset voltage histogram 5 20 30 50 - 40 - 15 10 35 85 60 0 10 15 20 30 25 5 gain error - % 25 20 15 0 10 - 0.2 0.2 - 0.4 0.4 0 gain error histogram percent of units - % 5 30 input offset voltage vs common - mode voltage input offset voltage - v supply voltage - volt 10 15 20 30 25 5 40 35 30 25 20 0
tsm9634 tsm9634ds r1p0 page 5 rtfds typical performance characteristics v rs+ = v rs - = 3.6 v; t a = +25 c, unless otherwise noted. gain error vs common - mode voltage supply voltage - volt 0.2 0.3 0.1 gain error - % 0 10 15 20 30 25 5 0 gain error vs. temperature gain error - % - 40 - 15 35 60 85 10 temperature - c 0 0.1 0.4 0.5 - 0.1 0.2 0.3 v sense - mv v out vs v sense @ supply = 3.6v 0 150 100 50 0 0.5 2.5 3 3.5 4 1.5 2 v out - v 1 g = 25 g = 50 g = 100 v out - v 0 100 60 20 v sense - mv v out vs v sense @ supply = 1.6v 40 80 0.4 1.6 0.8 1.2 0 1.4 1.0 0.6 0.2 g = 25 g = 50 g = 100 small - signal gain vs frequency small - signal gain - db 0.001 0.1 1 10 1000 5 - 5 - 15 - 35 - 25 frequency - khz 0 - 10 - 20 - 30 100 0.01 g = 25 g = 50 g = 100 common - mode rejection - db common - mode rejection vs frequency frequency - khz 0 - 40 - 80 - 20 - 60 - 100 - 140 - 120 g = 25 g = 50, 100 0.001 0.1 1 10 1000 100 0.01
tsm9634 page 6 tsm9634ds r1p0 rtfds input offset voltage histogram typical performance characteristics v rs+ = v rs - = 3.6 v; t a = +25 c, unless otherwise noted. 200 s/div v sense v out small - signal pulse response, gain = 50 200 s/div large - signal pulse response, gain = 50 v sense v out 200 s/div small - signal pulse response, gain = 25 v sense v out 200 s/div v sense v out large - signal pulse response, gain = 25 200 s/div small - signal pulse response, gain = 100 v sense v out 200 s/div v sense v out large - signal pulse response, gain = 100
tsm9634 tsm9634ds r1p0 page 7 rtfds pin functions pin label function sot23 5 rs+ external sense resistor power - side connection 4 rs - external sense resistor load - side connection 1, 2 gnd ground . connect these pin s to analog ground. 3 out output voltage. v out is proportional to v sense = v rs+ - v rs - block diagram s description of operation the internal configuration of the tsm9634 C a unidirectional high - side, current - sense amplifier - is based on a commonly - used operational amplifier (op amp) circuit for measuring load currents (in one direction) in the prese nce of high - common - mode voltages. in the general case, a current - sense amplifier monitors the voltage caused by a load current through an external sense resistor and generates an output voltage as a function of that load current. referring to the typical a pplication circuit on page 1 , the inputs of the op - amp - based circuit are connected across an external rsense resistor that is used to measure load current. at the non - inverting input of the tsm9634 (the rs + terminal), the applied voltage is i load x rsense. since the rs - terminal is the non - inverting input of the internal op amp, op - amp feedback action forces the inverting input of the internal op amp to the same potential (i load x rsense). therefore, the voltage drop across rsense (v sense ) and the voltage drop across r1 (at the rs+ terminal) are equal. to minimize any additional error because of op - amp input bias current mismatch, both r1s are the same value. since the internal p - channel fets source is connected to the inverting input of the internal op a mp and since the voltage drop across r1 is the same as the external v sense , op amp feedback action drives the gate of the fet such that the fets drain - source current is equal to: s v sense r 1
tsm9634 page 8 tsm9634ds r1p0 rtfds or s loa x r sense r 1 since the fets drain terminal is connected to rout, the output voltage of the tsm9634 at the out terminal is, therefore; v out loa x r sense x r out r 1 the current - sense amplifiers gain accuracy is therefore the ratio match of rout to r1. for each of the four gain options available, table 1 lists the values for rout and r1. the tsm9634 s output stage is protected against input overdrive by use of an output current - limiting circuit of 3 ma (typical) and a 7 v internal clamp protection circuit . table 1: internal gain setting resistors (typical values) gain (v/v) r1 ( ) rout ( ) part number 25 400 10k tsm9634 t 50 200 10k tsm9634 f 100 100 10k tsm9634 h 200 100 20k tsm9634 w applications informa tion choosing the sense resistor selecting the optimal value for the external rsense is based on the following criteria and for each commentary follows: 1) rsense voltage loss 2) v out swing vs. applied input voltage at v rs+ and desired v sense 3) total i load accuracy 4) circuit efficiency and power dissipation 5) rsense kelvin connections 1) rsense voltage loss for lowest ir voltage loss in rsense, the smallest usable value for rsense should b e selected. 2) v out swing vs. applied input voltage at v rs+ and desired v sense as there is no separate power supply pin for the tsm9634 , the circuit draws its power from the applied voltage at both its rs+ and rs - terminal s . therefore, the signal voltage at the out terminal is bounded by the minimum supply voltage applied to the tsm9634 . therefore, v out(max) = v rs+(min) - v sense(max) C v oh(max) and r sense v out max ga n loa max where the full - scale v sense should be less than v out (max) /gain at the applications minimum rs+ terminal voltage. for best performance with a 3.6v power supply, rsense should be chosen to generate a v sense of: a) 120mv (for the 25v/v gain option), b) 60mv (for the 50v/v gain option), c) 30mv (for the 100v/v gain option) , or d) 15mv (for the 200v/v gain option) at the full - scale i load (max) current in each application. for the case where the minimum power supply voltage is higher than 3.6v, each of the four full - scale v sense s above can be increased. 3) total i l oad accurac y in the tsm9634 s linear region where v out < v out(max) , there are two specifications related to the circuits accuracy: a) the tsm9634 s input offset voltage (v os = 250v , max ) and b) its gain error (ge(max) = 0.5%). an expression for the tsm9634 s total output voltage (+ error ) is given by: v out = [gain x (1 ge) x v sense ] (gain x v os ) a large value for rsense permits the use of smaller load currents to be measured more accurately because the effects of offset voltages are less significant w hen compared to larger v sense voltages. due car e though should be exercised as
tsm9634 tsm9634ds r1p0 page 9 rtfds previously mentioned with large values of rsense. 4) circuit efficiency and power dissipation ir losses in rsense can be large especially at high load currents. it is important to select the smallest, usable rsense value to minimize power dissipation and to keep the physical size of rsense small. if the external rsense is allowed to dissipate signi ficant power, then its inherent temperature coefficient may alter its design center value, thereby reducing load current measurement accuracy. precisely because the tsm9634 s input stage was designed to exhibit a very low input offset voltage , small rsense values can be used to reduce power dissipation and minimize local hot spots on the pcb. 5) rsense kelvin connections for optimal v sense accuracy in the presence of large load currents, parasitic pcb track resistance should be minimized. kelvin - sense pcb connections between rsense and the tsm9634 s rs+ and rs - terminals are strongly recommended. the drawing in figure 1 illustrates the connections between the current - sense amplifier and the current - sense resistor. the pcb layout should be balanced and symmetrical to minimize wiring - induced errors. in addition, the pcb layout for rsense should include good thermal management techniques fo r optimal rsense power dissipation. optional output filter capacitor if the tsm9634 is part of a signal acquisition system where its out terminal is connected to the input of an adc with an internal, switched - capacitor track - and - hold circuit, the interna l track - and - holds sampling capacitor can cause voltage droop at v out . a 22nf to 100nf good - quality ceramic capacitor from the out terminal to gnd should be used to minimize voltage droop (holding v out constant during the sample interval. using a capacitor on the out terminal will also reduce the tsm9634 s small - signal bandwidth as well as band - limiting amplifier noise. using the tsm9634 in bidirectional load current applications in many battery - powered systems, it is oftentimes necessary to monitor a batterys discharge and charge currents. to perform this function, a bidirectional current - sense amplifier is required. the circuit illustrated in figure 2 shows how two tsm9634 s can be configured as a bidirectional current - sense amplifier. as shown in the figure, the figure 1 : making pcb connections to the sense resistor (drawing is not to scale) . figure 2 : using two tsm9634s for bidirectional load current detection
tsm9634 page 10 tsm9634ds r1p0 rtfds rs+/rs - input pair of tsm9634 #2 is wired opposite in polarity with respect to the rs+/rs - connections of tsm9634 #1. current - sense amplifier #1 therefore measures the d ischarge current and current - sense amplifier #2 measures the charge current. note that both output voltages are measured with respect to gnd. when the discharge current is being measured, v out1 is active and v out2 is zero; for the case where charge curren t is being measured, v out1 is zero, and v out2 is active. pc board layout and power - supply bypassing for optimal circuit performance, the tsm9634 should be in very close proximity to the external current - sense resistor and the pcb tracks from rsense to the rs+ and the rs - input terminals of the tsm9634 should be short and symmetric. also recommended are a ground plane and surface mount resistors and capacitors.
tsm9634 touchstone semiconductor, inc. page 11 630 alder drive, milpitas, ca 95035 tsm9634ds r1p0 +1 (408) 215 - 1220 ? www.touchstonesemi.com rtfds package outline draw ing 5 - pin s ot23 package outline drawing (n.b., drawings are not to scale) information furnished by touchstone semiconductor is believed to be accurate and reliable. however, touchstone semiconductor does not assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use , and all information provided by touchstone semiconductor and its suppliers is provided on an as is basis, without warranty of any kin d . touchstone semiconductor reserves the right to change product specificat ions and product descriptions at any time without any advance notice. no license is granted by implication or otherwise under any patent or patent rights of touchstone semiconductor. touchstone semiconductor assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using touchstone semiconductor components. to minimize the risk associated with customer products and applicatio ns, customers should provide adequate design and oper ating safeguards. trademarks and registered trademarks are the property of their respective owners. n o t e s : 1 . d i m e n s i o n s a n d t o l e r a n c e s a r e a s p e r a n s i y 1 4 . 5 m , 1 9 8 2 . 2 . p a c k a g e s u r f a c e t o b e m a t t e f i n i s h v d i 1 1 ~ 1 3 . 3 . d i e i s f a c i n g u p m o l d a n d f a c i n g d o w n f o r t r i m / f o r m , i e , r e v e r s e t r i m / f o r m . 4 . t h e f o o t l e n g t h m e a s u r i n g i s b a s e d o n t h e g a u g e p l a n e m e t h o d . 5 . d i m e n s i o n s a r e e x c l u s i v e o f m o l d f l a s h a n d g a t e b u r r . 6 . d i m e n s i o n s a r e e x c l u s i v e o f s o l d e r p l a t i n g . 7 . a l l d i m e n s i o n s a r e i n m m . 8 . t h i s p a r t i s c o m p l i a n t w i t h e i a j s p e c . a n d j e d e c m o - 1 7 8 a a 9 . l e a d s p a n / s t a n d o f f h e i g h t / c o p l a n a r i t y a r e c o n s i d e r e d a s s p e c i a l c h a r a c t e r i s t i c . 5 . 2 . 8 0 - 3 . 0 0 2 . 6 0 - 3 . 0 0 1 . 5 0 - 1 . 7 5 0 . 9 5 0 . 9 5 0 t y p 5 5 0 . 3 0 - 0 . 5 0 0 . 0 0 - 0 . 1 5 1 0 o t y p 1 0 o t y p 1 0 o t y p 0 . 0 9 - 0 . 2 0 5 1 0 o t y p 0 o - 8 o 0 . 3 0 - 0 . 5 5 0 . 2 5 g a u g e p l a n e 1 . 9 0 m a x 0 . 1 0 m a x 0 . 0 9 C 1 . 4 5 0 . 5 0 C 0 . 7 0 1 . 5 0 C 1 . 7 5 0 . 5 0 m a x 0 . 3 0 m i n 0 . 2 0 m a x 0 . 0 9 m i n 0 . 9 0 - 1 . 3 0 0 . 6 0 C 0 . 8 0 t y p

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